Transient temperature rise for multi-chip packages.

All-copper Chip-to-substrate Interconnections for Flip-chip Packages

Singular stress fields at corners in flip-chip packages

An electronic device integrates diverse materials, and inevitably contains sharp features, such as interfaces and corners. When the device is subject to thermal and mechanical loads, the corners develop intense stress and are vulnerable sites to initiate failure. This paper analyzes stress fields at corners in flip-chip packages. The stress at a corner is a linear superposition of two modes of ...

Moisture absorption and desorption in wafer level chip scale packages

Article history: Received 28 May 2015 Received in revised form 18 June 2015 Accepted 29 June 2015 Available online xxxx

A ChIP-Seq Data Analysis Pipeline Based on Bioconductor Packages

Nowadays, huge volumes of chromatin immunoprecipitation-sequencing (ChIP-Seq) data are generated to increase the knowledge on DNA-protein interactions in the cell, and accordingly, many tools have been developed for ChIP-Seq analysis. Here, we provide an example of a streamlined workflow for ChIP-Seq data analysis composed of only four packages in Bioconductor: dada2, QuasR, mosaics, and ChIPse...

Endoscopic Inspection of Solder Joint Integrity in Chip Scale Packages

This paper reports, for the first time, the use of endoscopy for the nondestructive examination of solder joint integrity in chip scale packages (CSP) such as flip chip on flex (FCF). Borrowed from the medical instrument technology, the endoscope is used to examine visually the inside of an organ. This concept has now been developed and refined by ERSA and KURTZ, and led to an ERSASCOPE inspect...